Fully flexible baseband DSP processors for future SDR/JTRS

A real SDR/JTRS (Software Defined Radio / Joint Tactical Radio System) transceiver can be linked to any public or private radio system. The transceiver baseband processor must adapt to the actual radio channel coding and shall manage ISI, mobility, synchronization, and different interferers. Current baseband solutions are unable to fulfil these requirements because of limited flexibility. A fully programmable baseband DSP processor (BBP) was designed by a research team in Linköping University, Sweden and fabricated using 0.18 μm digital CMOS technology. The BBP can handle 802.11a, b, g, and GSM/GPRS by running different software on the same processor. The power consumption is less than 100mW running 802.11a peak reception mode at frequency 160MHz. The die size is only 2.9mm, about half compared to non-programmable solutions thanks to the high hardware utilization. The new BBP facilitates a fully programmable baseband processor for any current available radio link standard for SDR and JTRS.